What are the benefits of FPGA-based SmartNICs?
As today telecom operators face the challenges of network edge virtualization, traffic data path offloading to FPGA-based SmartNICs offer the ideal solution toward accelerating telco/cloud networks.
FPGAs are open, programmable hardware and a perfect complement to COTS servers in that they are general purpose and agile. Their full programmability futureproofs edge sites such that hardware does not need to be replaced or upgraded as frequently.
An FPGA on SmartNIC can be reprogrammed as needed, instead of replacing the whole card, if the application or use case changes. Therefore, FPGA based SmartNICs provide unmatched scalability to enable communication service providers to easily handle large numbers of subscribers and devices at cost without significantly adding latency and power.
With an FPGA, a network interface connects directly to the pins of the chip, which therefore offers very high bandwidth (as well as low latency) and better ability to scale for high throughput applications. That’s why FPGA SmartNICs are indispensable in next-generation networks.
Power efficiency is just as important. FPGAs intrinsically handle the logic computations used for acceleration with little energy output. Also, FPGA SmartNICs do not require a host CPU to handle the networking, saving additional energy on the host side.
FPGA SmartNICs provide perfect balance for the network edge, with deterministic high performance on the one hand, and especially low space and power requirements on the other. They are also very effective in reducing latency. Deterministic low latency is a great advantage. By using an FPGA, it is feasible to achieve a latency around or below one milliseconds (ms), because FPGAs don’t rely on the operating system. By comparison, when a CPU is used for networking, a latency smaller than 50 ms is considered very good.
Another important advantage of SmartNICs is in cybersecurity by isolating the networking from the compute. Should the CPU be hacked, the data path (handled by the FPGA) is still protected. The FPGA also can handle security functions such as encryption, ACL, and firewall, thereby protecting the CPU from malicious attacks.
Superior Performance and Saving Costs
FPGA SmartNICs provide perfect balance for the network edge, with deterministic high performance on the one hand, and especially low space and power requirements on the other.
For example, at Ethernity, we compared virtual Broadband Network Gateway (vBNG) performance and cost in a side-by-side test between a server-only setup and one using FPGA SmartNIC acceleration. In every test, FPGA SmartNICs demonstrated superior efficiency. Core utilization, for example, never exceeded eight percent even at 200 Gbps total throughput.
In power consumption, FPGA SmartNIC usage was one-tenth that of a server-only approach at 200 Gbps, and never exceeded 26 percent at any data rate. And in the cost comparison, the FPGA SmartNIC approach cost a small fraction of the server-only method at all data rates.
